Qi, Xiuyuan, Reviriego, Pedro, Conde, Javier, Liu, Shanshan · Nov 4, 2026
BlockLock: Reproducible LLM Inference with Fixed Batch Geometry — arXiv cs.AI, tested on NVIDIA GPUs
Markdown · JSON · Original source
Xiuyuan Qi, Pedro Reviriego, Javier Conde and Shanshan Liu present BlockLock, a method intended to make a protected request produce the same output when the other requests in its batch change. They argue that existing approaches either constrain every operator or sacrifice shared prefill compute and pad decode. BlockLock instead keeps shared batched prefill and pins only the protected request’s numerical path. Its two modes, BlockLock-Rows and BlockLock-Pack, use different ways of fixing the geometry seen by that request. Under a stated per-deployment contract, the authors report that both preserve the target’s output bitwise when its companions change. In tests across five dense models and three single- deployments, they report preserving target sequences and Top20-logit bits. At equal delivered work, BlockLock-Rows reduces and improves throughput relative to vLLM Batch-Invariant. The authors say BlockLock needs no custom kernel implementations compared with batch-invariant kernels, and constrains only protected requests. The results describe the reported tests and contract; they do not by themselves establish performance or reproducibility for other deployments.
Headline and summary by Escape Meridian, prepared by Luna from the attributed source. A source check is not independent confirmation of the source’s claims.
Original source
cs.AI · Article
Source details
Original source date: Nov 4, 2026 (2026-11-04).
Date basis: Date basis not provided.
Added to Escape Meridian: 2026-11-08T05:49:32.198Z. First observed: 2026-11-06T05:11:11.301Z. Retrieved: 2026-11-08T05:48:45.499Z.
Referenced by
Recorded citations and public file attachments. A reference alone does not establish agreement or influence.
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Limits
The evidence is an abstract-level account of reported tests across five dense models and three single- deployments; it also mentions initial tensor-parallel experiments on two A6000 GPUs. The reported reproducibility guarantee is stated under a per-deployment contract; the supplied evidence does not establish its scope beyond that contract and the reported tests.
Open question
Would BlockLock preserve the target’s output bitwise under the stated per-deployment contract on models and deployments beyond those tested?
Source-stated
The authors propose BlockLock to preserve a protected request’s output when its batch companions change, while keeping shared batched prefill.
BlockLock, which keeps shared batched prefill and pins only the numerical path of the protected request
Source-stated
The authors describe two modes: BlockLock-Rows and BlockLock-Pack, with different ways of fixing the geometry seen by the protected request.
two modes: BlockLock-Rows uses fixed-width rows and retains batched decode of all requests; BlockLock-Pack uses terminal-anchored packing
Source-stated
Under a stated per-deployment contract, the authors report bitwise preservation when companions change; reported tests also preserve target sequences and Top20-logit bits.
Under a stated per-deployment contract, both modes preserve the target's output bitwise when its companions change.
Source-stated
At equal delivered work, BlockLock-Rows reduces latency and improves throughput relative to vLLM Batch-Invariant, according to the authors.
reduces latency by 53.5--55.0\% and improves throughput by 115.2--122.2\% relative to vLLM Batch-Invariant
Source and contributor context
Qi, Xiuyuan, Reviriego, Pedro, Conde, Javier, Liu, Shanshan · Article author
These are credits stated by the source; they do not establish a profile match or authorship of every passage.
Source media
No suitable media was found by the supported page extraction.
Terms and references
Reference context selected by Escape Meridian; separate from source evidence. Entity mentions do not establish authorship, involvement or endorsement.
Large language model
A language model with many learned numerical settings, used to process and generate language.
Graphics processing unit
A chip that performs many calculations at once; the main hardware used to train and run AI models.
Latency
The delay between sending a request and receiving the result.
arXiv
arXiv is a research manuscript repository where authors share papers that may not yet have been peer reviewed.
NVIDIA
NVIDIA develops processors, networking and software used for AI, graphics and scientific computing.
Editorial provenance
Version 1. Publication ID: 29613995-45ee-4162-8555-78a374b76f11.
Prepared by gpt-6-luna; grounding review by gpt-6-luna.
Source check: uncertain by anthropic/claude-opus-5.5 on 2026-11-08T05:49:32.198Z. This checks fidelity to the source, not whether its claims are independently true.
Editorial selection: accept; reasons: material_development.
Observation: d36440e675ab7d34f942eff30d62d9eef3325571fe41e7848349413d5f691be8. Source text hash: 5169ede41ee3fb194e0ba81112bf0dbceb627bfdb3aac3c5fdf126d7600bcc7e.
Revision and source-check history
Version 1 · 2026-11-08T05:49:32.198Z
BlockLock: Reproducible LLM Inference with Fixed Batch Geometry — arXiv cs.AI, tested on NVIDIA GPUs
Xiuyuan Qi, Pedro Reviriego, Javier Conde and Shanshan Liu present BlockLock, a method intended to make a protected request produce the same output when the other requests in its batch change. They argue that existing approaches either constrain every operator or sacrifice shared prefill compute and pad decode. BlockLock instead keeps shared batched prefill and pins only the protected request’s numerical path. Its two modes, BlockLock-Rows and BlockLock-Pack, use different ways of fixing the geometry seen by that request. Under a stated per-deployment contract, the authors report that both preserve the target’s output bitwise when its companions change. In tests across five dense models and three single- deployments, they report preserving target sequences and Top20-logit bits. At equal delivered work, BlockLock-Rows reduces and improves throughput relative to vLLM Batch-Invariant. The authors say BlockLock needs no custom kernel implementations compared with batch-invariant kernels, and constrains only protected requests. The results describe the reported tests and contract; they do not by themselves establish performance or reproducibility for other deployments.
Original source
cs.AI · Article
Source details
Original source date: Nov 4, 2026 (2026-11-04).
Date basis: Date basis not provided.
Added to Escape Meridian: 2026-11-08T05:49:32.198Z. First observed: 2026-11-06T05:11:11.301Z. Retrieved: 2026-11-08T05:48:45.499Z.
Limits
The evidence is an abstract-level account of reported tests across five dense models and three single- deployments; it also mentions initial tensor-parallel experiments on two A6000 GPUs. The reported reproducibility guarantee is stated under a per-deployment contract; the supplied evidence does not establish its scope beyond that contract and the reported tests.
Open question
Would BlockLock preserve the target’s output bitwise under the stated per-deployment contract on models and deployments beyond those tested?
Source-stated
The authors propose BlockLock to preserve a protected request’s output when its batch companions change, while keeping shared batched prefill.
BlockLock, which keeps shared batched prefill and pins only the numerical path of the protected request
Source-stated
The authors describe two modes: BlockLock-Rows and BlockLock-Pack, with different ways of fixing the geometry seen by the protected request.
two modes: BlockLock-Rows uses fixed-width rows and retains batched decode of all requests; BlockLock-Pack uses terminal-anchored packing
Source-stated
Under a stated per-deployment contract, the authors report bitwise preservation when companions change; reported tests also preserve target sequences and Top20-logit bits.
Under a stated per-deployment contract, both modes preserve the target's output bitwise when its companions change.
Source-stated
At equal delivered work, BlockLock-Rows reduces latency and improves throughput relative to vLLM Batch-Invariant, according to the authors.
reduces latency by 53.5--55.0\% and improves throughput by 115.2--122.2\% relative to vLLM Batch-Invariant
Source and contributor context
Qi, Xiuyuan, Reviriego, Pedro, Conde, Javier, Liu, Shanshan · Article author
These are credits stated by the source; they do not establish a profile match or authorship of every passage.
Source media
No suitable media was found by the supported page extraction.
Terms and references
Reference context selected by Escape Meridian; separate from source evidence. Entity mentions do not establish authorship, involvement or endorsement.
Large language model
A language model with many learned numerical settings, used to process and generate language.
Graphics processing unit
A chip that performs many calculations at once; the main hardware used to train and run AI models.
Latency
The delay between sending a request and receiving the result.
arXiv
arXiv is a research manuscript repository where authors share papers that may not yet have been peer reviewed.
NVIDIA
NVIDIA develops processors, networking and software used for AI, graphics and scientific computing.
Editorial provenance
Version 1. Publication ID: 29613995-45ee-4162-8555-78a374b76f11.
Prepared by gpt-6-luna; grounding review by gpt-6-luna.
Source check: uncertain by anthropic/claude-opus-5.5 on 2026-11-08T05:49:32.198Z. This checks fidelity to the source, not whether its claims are independently true.
Editorial selection: accept; reasons: material_development.
Observation: d36440e675ab7d34f942eff30d62d9eef3325571fe41e7848349413d5f691be8. Source text hash: 5169ede41ee3fb194e0ba81112bf0dbceb627bfdb3aac3c5fdf126d7600bcc7e.
uncertain · 2026-11-08T05:49:32.198Z · anthropic/claude-opus-5.5
Publication: 29613995-45ee-4162-8555-78a374b76f11
attribution — pass: The reading correctly credits Xiuyuan Qi, Pedro Reviriego, Javier Conde and Shanshan Liu and frames the results as the authors' reported findings.
Authors:Xiuyuan Qi, Pedro Reviriego, Javier Conde, Shanshan Liu
summary — uncertain: The summary follows the abstract faithfully, but a non-specialist could not follow it. Central terms are left unexplained in plain language: batch, prefill, decode, operator, kernel, batch geometry, bitwise, Top20-logit bits and vLLM Batch-Invariant. The draft also never says in plain terms why identical output regardless of batch companions matters. Smallest repair: add brief plain-language explanations or term-library tooltips for these terms, and include the source's own one-line definition of reproducible inference. Do not add new motives.
Reproducible LLM inference requires that a request produces the same output regardless of the other requests in the batch.
date — pass: The originalPublished date of 2026-11-04 matches the arXiv v1 submission date. It is not the later feed date.
[Submitted on 4 Nov 2026]
support — pass: The claims, limitations and question are grounded in the abstract. The performance claim is scoped to the comparison at equal delivered work against vLLM Batch-Invariant. The bitwise claim keeps the per-deployment contract condition. The question flags an open issue without assuming an answer, and no benefits or costs are invented.
Both modes preserve target sequences and Top20-logit bits in the reported tests.
media — pass: The selected media is the verified direct arXiv abstract page for this paper, which is the most direct way to access the source.
Challenge or correct this reading
Send a correction or an opposing source with this reading’s URL. Disagreement and uncertainty can remain unresolved.
A chip that performs many calculations at once; the main hardware used to train and run AI models.
Definition referenceThe delay between sending a request and receiving the result.
Definition referencearXiv is a research manuscript repository where authors share papers that may not yet have been peer reviewed.
Explore arXivA chip that performs many calculations at once; the main hardware used to train and run AI models.
Definition referenceNVIDIA develops processors, networking and software used for AI, graphics and scientific computing.
Explore NVIDIAA chip that performs many calculations at once; the main hardware used to train and run AI models.
Definition referenceThe delay between sending a request and receiving the result.
Definition referencearXiv is a research manuscript repository where authors share papers that may not yet have been peer reviewed.
Explore arXivA chip that performs many calculations at once; the main hardware used to train and run AI models.
Definition referenceNVIDIA develops processors, networking and software used for AI, graphics and scientific computing.
Explore NVIDIA